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This section is broken into two parts: The ZX Spectrum 128K / +2 and
ZX Spectrum +2a / +3. Each of these may have several sub-sections. Within each section, you
may find links to additional information elsewhere in this FAQ, or to other reference documents. Several original User
and Technical Manuals are available - these are listed in the
documentation section.
The ZX Spectrum 128K / +2:
The 128K machine is similar to the 48K machine, but with extra memory accessed by paging it into the top 16K of RAM. There are
also some timing differences:
- The main processor runs at 3.54690 MHz, as opposed to 3.50000 MHz.
- There are 228 T-states per scanline, as opposed to 224.
- There are 311 scanlines per frame, as opposed to 312.
- There are 63 scanlines before the television picture, as opposed to 64.
Note that this means that there are 70908 T states per frame, and the '50 Hz' interrupt occurs at 50.01 Hz, as compared
with 50.08 Hz on the 48K machine. The ULA bug which causes snow when I is set
to point to contended memory still occurs, and also appears to crash the machine shortly after I is set to point to contended memory.
There are 3 subsections available:
Memory,
Keypad and
Sound.
- Memory
When memory is being paged, interrupts should be disabled and the stack should be in an area which is not going to change.
If normal interrupt code is to run, then the system variable at 5B5Ch (23388) must be kept updated with the last value sent to
port 7FFDh. It is not possible to read this port.
On the 128 and +2, memory is entirely controlled by port 7FFDh. The byte to output will be interpreted thus:
Bits 0-2: RAM page (0-7) to map into memory at 0C000h.
Bit 3: Select normal (0) or shadow (1) screen to be displayed. The normal screen is in bank 5, whilst the shadow screen is
in bank 7. Note that this does not affect the memory between 0x4000 and 0x7fff, which is always bank 5.
Bit 4: ROM select. ROM 0 is the 128k editor and menu system; ROM 1 contains 48K BASIC.
Bit 5:If set, memory paging will be disabled and further output to this port will be ignored until the computer is reset.
The memory map of these computers is:
FFFFh +--------+--------+--------+--------+--------+--------+--------+--------+
| Bank 0 | Bank 1 | Bank 2 | Bank 3 | Bank 4 | Bank 5 | Bank 6 | Bank 7 |
| | |(also at| | |(also at| | |
| | | 8000h) | | | 4000h) | | |
| | | | | | screen | | screen |
C000h +--------+--------+--------+--------+--------+--------+--------+--------+
| Bank 2 | Any one of these pages may be switched in.
| |
| |
| |
8000h +--------+
| Bank 5 |
| |
| |
| screen |
4000h +--------+--------+
| ROM 0 | ROM 1 | Either ROM may be switched in.
| | |
| | |
| | |
0000h +--------+--------+
RAM banks 1,3,4,6 and most of 7 are used for the silicon disc; the rest of 7 contains editor scratchpads.
For the +2a and +3, memory banks 4-7 are contended (i.e. the processor shares them with the
ULA); on the 128K/+2 models, banks 1,3,5,7 are contended. This reduces
the speed of memory access in these banks. Port #FE
is still contended, and port #7FFD also causes contention, although the precise details of this are not known.
An example of a typical bank switch on the 128 is:
LD A,(5B5Ch) ;Previous value of port
AND 0F8h
OR 4 ;Select bank 4
LD BC,7FFDh
DI
LD (5B5Ch),A
OUT (C),A
EI
The principle is the same for all bank switching: change only the bits you need to.
The contended memory timings for these machines are similar to that for the 48K machine, except that
the 6,5,4,3,2,1,0,0 pattern starts at 14361 T-states after the interrupt, as opposed to 14335.
- Keypad
The 128K machine's keypad extra editing facilities are also available via the normal keyboard:
FUNCTION KEYS
-----------------------------------------
Beginning of next word [E] [S] J
Beginning of previous word [E] I
Up ten lines [E] P
Down ten lines [S] I
Start of line [E] [S] 2
End of line [E] M
First line [E] N
Last line [E] T
Screen [E] [S] 8
Delete this character [E] [S] K
Delete word left [E] E
Delete word right [E] W
Delete to start of line [E] K
Delete to end of line [E] J
[E] = Extended Mode
[S] = Symbol Shift
- Sound Chip
The AY-3-8912 sound chip is a widely used one, to be found in the MSX,
Vectrex, Amstrad CPC range, etc. It is controlled by two I/O ports:
OUT (0FFFDh) - Select a register 0-14
IN (0FFFDh) - Read the value of the selected register
OUT (0BFFDH) - Write to the selected register
The Timex TS2068 also features an AY
chip, using port #F5 to select registers and #F6 for data. For a more complete list of TS2068 ports, see the
TS2068 ROM file.
Typically, the AY chip is written to inside 128K games using:
LD BC,#FFFD 01 FD FF
OUT (C),D ED 51
LD B,#BF 06 BF
OUT (C),E ED 59
To convert to a TS2068 poke a few values as follows:
LD BC,#FFF5 01 F5 FF
OUT (C),D ED 51
LD C,#F6 0E F6
OUT (C),E ED 59
If you've got a Fuller box, you can do the same mod, replacing F5 with 3F and F6 with 5F.
ZX Spectrum +2a / +3:
The +2a/+3 share the same timing information, sound chip, etc as
the 128K/+2 machines; see above for details.
Bit 6 of Port #FE of the +2a/+3 does not show the same dependence on what was
written to Port #FE as it does on the other machines, and always returns 0 if there
is no signal. Finally, reading from a non-existing port (eg #FF) will always return 255, and not give any screen/attribute bytes as it does on
the 48K/128K/+2:
- Memory
The basic principle of paging on the +2a and +3 is the same as for the 128K/+2. However, the +2a and +3 have four ROMs
rather than two, and certain extra memory configurations.
Port 7FFDh behaves in the same way as before, except that bit 4 is now the low bit of the ROM selection. The extra features
are controlled by port 1FFDh. This port is also write-only, and its last value should be saved at 5B67h (23399).
Port 1FFDh responds thus:
Bit 0: Paging mode. 0=normal, 1=special
Bit 1: In normal mode, ignored.
Bit 2: In normal mode, high bit of ROM selection. The four ROMs are:
ROM 0: 128k editor, menu system and self-test program
ROM 1: 128k syntax checker
ROM 2: +3DOS
ROM 3: 48 BASIC
Bit 3: Disk motor; 1=on, 0=off
Bit 4: Printer port strobe.
When special mode is selected, the memory map changes to one of four configurations specified in bits 1 and 2 of port 1FFDh:
Bit 2 =0 Bit 2 =0 Bit 2 =1 Bit 2 =1
Bit 1 =0 Bit 1 =1 Bit 1 =0 Bit 1 =1
FFFFh+--------+ +--------+ +--------+ +--------+
| Bank 3 | | Bank 7 | | Bank 3 | | Bank 3 |
| | | | | | | |
| | | | | | | |
| | | screen | | | | |
C000h+--------+ +--------+ +--------+ +--------+
| Bank 2 | | Bank 6 | | Bank 6 | | Bank 6 |
| | | | | | | |
| | | | | | | |
| | | | | | | |
8000h+--------+ +--------+ +--------+ +--------+
| Bank 1 | | Bank 5 | | Bank 5 | | Bank 7 |
| | | | | | | |
| | | | | | | |
| | | screen | | screen | | screen |
4000h+--------+ +--------+ +--------+ +--------+
| Bank 0 | | Bank 4 | | Bank 4 | | Bank 4 |
| | | | | | | |
| | | | | | | |
| | | | | | | |
0000h+--------+ +--------+ +--------+ +--------+
RAM banks 1,3,4 and 6 are used for the disc cache and RAMdisc, while Bank 7 contains editor scratchpads and +3DOS
workspace.
The contended memory timings differ on the +2a/+3 from the earlier machines; firstly, the timing differences mean that
the top-left pixel of the screen is displayed 14364 T-states after the 50 Hz interrupt occurs, as opposed to 14336. The T-states
(relative to the interrupt) at which delays occur are given in the following table:
Cycle # Delay
------- -----
14365 1
14366 No delay
14367 7
14368 6
14369 5
14370 4
14371 3
14372 2
14373 1
14374 No delay
14375 7
14376 6
and so on, until cycle 14494, when the display of the first scanline on the screen has been completed, and no more delays are
inserted until 14593 (=14365+228) when the cycle repeats. The other difference occurs for instructions which have multiple
'pc+1' or 'hl' entries in the breakdown for the other machines: on the +2a/+3, these entries are combined into just one. This
means that, for example, JR becomes pc:4,pc+1:8.
Like the base 128K machine, RAM banks 4-7 are contended. However, Port #FE
is not; whether ports #7FFD and #1FFD are
contended is currently unknown.
- Disk Drive
Please refer to the Disk Reference page for details of the +3 Disk Drive.
| special thanks to Woody
for correcting and clarifying the 128K / +2 Memory entry | |